MARTS: Memory Allocation with Real-Time Scheduling
Many real-time (RT) embedded systems could benefit from a memory hierarchy to bridge the processor/memory speed gap. These RT embedded systems usually utilize a cacheless architecture to avoid the time variability which complicates the timing analysis essential for RT systems. In the absence of a cache the burden of allocating the data objects to the memory hierarchy is on the programmer or compiler.
DARTS: Data Allocation with Real-Time Scheduling
We have developed a synergistic, optimal approach to allocating data objects and scheduling real-time tasks for embedded systems. We allocate data using integer linear programming (ILP) to minimize each task's worst-case execution time (WCET), then perform preemption threshold scheduling (PTS) on the tasks to reduce stack memory requirements while still meeting hard RT deadlines. The memory reduction of PTS allows these steps to be repeated. The data objects now require less memory, so more can fit into faster memory, further reducing WCET. The increased slack time can be used by PTS to reduce preemptions further, until a fixed point is reached.
The toolchain which supports DARTS concept can be downloaded at https://ARAGORN.ece.ncsu.edu/svn/public/. Use “guest” for both login ID and password.
The current version supports Olimex LPC-H2888 with NXP LPC-2888 controller. This executable is compiled under CYGWIN.
This file should be fed into ARMSAT. This describes running options of ARMSAT and forced program information manually specified.
This file should be fed into stacksplit.py to let the script know what it should do for stack split.
Other tools and information are in being prepared for posting.
This material is based upon work supported by the National Science Foundation under Grant No. 0720797. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the National Science Foundation.
Jul. 7, 2010