The power used by a digital circuit is proportional to the square of the operating voltage, so lowering the voltage lowers the power used. Different parts of an embedded system may have different minimum operating voltages, but the cost of converting power efficiently between voltage levels is significant. This limits the feasibility of reducing power by using multiple voltage domains.
The goal of this project is to improve embedded system energy efficiency by lowering the implementation cost of operating multiple voltage domains within a system. The first step is to evaluate the real-time and computational requirements of software controlling power converters in order to determine how to minimize overall system cost and energy. We will then use design methods from the real-time and embedded system communities to create a science of design for such systems.
Materials are available for download at https://sites.google.com/site/ncsuextavs/home.
Team personnel include the following:
· PI: Dr. Alex Dean
· Co-PI: Dr. Subhashsish Bhattacharya
· Graduate Students:
o Avik Juneja
o Mihir Shah
o Michael Plautz
o Tharunachalam Pindicura
· Undergraduate Student:
o Miguel Rufino
This material is based upon work supported by the National Science Foundation under Grant No. 1116850. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the National Science Foundation.
Switch Mode Power Supplies (SMPS) efficiently convert energy and help increase the life of batteries. But they introduce electro-magnetic interference (EMI) in the circuit and this affects performance of noise sensitive electronic components like Analog to Digital Converter (ADC). Such limitations inhibit the use of SMPS in tiny, low-cost and low-power embedded systems. In this paper we present a scheduling approach called Make And Take (MAT) which is both energy and EMI aware, and efficiently supports SMPS in hard realtime embedded systems. MAT schedules the tasks based on the total energy in the system by segregating them as either producer or consumer of energy. Not only does this make the system more energy efficient, but also avoids the need for expensive filtering circuit thus reducing the area and cost of embedded circuit boards. We discuss MAT in detail and show how it can be applied to both preemptive and non-preemptive scheduling approaches. We present several properties of MAT and their impact on the system, in terms of energy and real-time scheduling decisions. We demonstrate its usage by implementing a simple processor controlled boost SMPS on a non-preemptive real-time embedded platform.
A Switch-Mode Power Supply (SMPS) is invaluable in its ability to efficiently convert energy, which allows digital logic circuits to operate at the most efficient voltage based upon power and timing parameters, saving power and energy. However, an SMPS introduces noise into the system. Some real-time computing systems contain hardware resources that are ‘rivalrous’ in nature. These comprise of groups of resources that create or are sensitive to noise – a Switch Mode Power Supply (SMPS) and an Analog to Digital Converter (ADC), for example. The measured data is affected. High frequency filters and chokes can be added to suppress such noise, but increase circuit cost, size, mass and area.
This paper presents Rivalrous Hardware Scheduling (RHS), a technique that utilizes real-time scheduling concepts for controlling the run-times of such rivalrous hardware via a software scheduler in order to reduce interference among them. As part of RHS, we propose an energy aware scheduling technique, called the Make And Take (MAT) scheduling model, which (1) controls the activity of the SMPS and (2) schedules the tasks based on the total energy in the system and whether they produce or consume energy. We demonstrate and prove the concept of RHS using MSP430-based low-power embedded nodes. By implementing a processor controlled SMPS on these nodes, we study the negative impact of adding an SMPS in the system and show how it can be overcome by using the principles of RHS.
Dynamic frequency scaling and dynamic voltage scaling have been developed to save power and/or energy for general purpose computing platforms and high-end embedded systems. This paper examines the practicality of using these advanced techniques to save power and energy for commodity 8-bit microcontrollers while leveraging their built-in low-power modes. The benefits of the techniques are weighed against their complexity and cost. First, we mathematically model the power dissipation characteristics of 11 popular 8-bit microcontrollers. We then simulate their power dissipation with different power management techniques being applied. The role of the power scheduler, the power supply, and the frequency divider circuit are also described and analyzed. We find that although dynamic voltage scaling renders the lowest energy dissipation for most microcontrollers, it is not always dramatically better than using a combination of dynamic frequency scaling and the built in power down modes, which is much less expensive to implement.